In a drive control of an insulated gate bipolar transistor (IGBT), which is a kind of voltage driving semiconductor element, there is a technique of applying a gate voltage while monitoring a voltage between a collector and an emitter for reducing a switch loss generated at turning-off. For example, in JP-A-2011-103756 (hereafter, referred to as a patent document 1), a gate of an IGBT is divided into a driving gate and a detecting gate, and a collector voltage detection circuit detects a collector voltage using a parasitic capacitance between the detecting gate and the collector. According to this configuration, the collector voltage can be detected without connecting an element, such as a resistance element or a capacitor, to the collector at outside of an IGBT module.
The patent document 1 further discloses a configuration in which a voltage between the collector and the emitter is divided between the parasitic capacitance and a capacitance of a capacitor by connecting the capacitor between the detecting gate and the ground, and a divided potential is detected by a gate drive circuit. According to this configuration, a circuit element of high breakdown voltage is unnecessary to the gate drive circuit.
In the configuration in the patent document 1, a charge of the parasitic capacitance is transferred to a capacitor in a collector voltage detection circuit, a change of charges in the capacitor is reflected to an output voltage of an operational amplifier, and the output voltage is output to a gate drive control circuit. In this configuration, it is practically difficult to change the driving state of the gate drive control circuit by the voltage output from the collector voltage detection circuit to restrict a surge voltage and to reduce a switching loss during a switching operation of the IGBT because of a delay in response. The patent document 1 fails to disclose a timing diagram indicating how to change the gate voltage of the IGBT by operations of the collector voltage detection circuit and the gate drive control circuit.
Furthermore, in the above-described configuration, it is preferable that a ratio of the parasitic capacitance and the capacitance of an external element is constant for detecting the voltage between the collector and the emitter with accuracy. However, in the configuration of the patent document 1, there are manufacturing variations and difference of temperature characteristics between the parasitic capacitance and an external capacitor. In addition, there is a considerable temperature difference between the IGBT including the parasitic capacitance and a control substrate on which the collector voltage detection circuit including the capacitor is disposed in an operating environment, and a variation of the capacitance ratio tends to be large. Furthermore, because the gate and the emitter are separated, a detecting element may be erroneously turned on.